Huawei’s chief scientist of its semiconductor division, Liao Heng, warned that large AI chips from Nvidia and other manufacturers are nearing their physical scaling limits, according to a four-hour interview with a Chinese blogger reported by Bloomberg. Liao said the industry has relied too heavily on increasing die size, transistor density, and high-bandwidth memory (HBM) capacity, stating, “There must be a limit to how they scale through larger computational dies and more HBM. The industry keeps pushing forward, but once it crosses this physical limit, an avalanche will occur.” He promoted Huawei’s Tau Scaling Law, which focuses on reducing signal transmission time between chip parts rather than shrinking transistors. Huawei introduced this approach in May at the Institute of Electrical and Electronics Engineers conference in Shanghai, where He Tingbo said it should help achieve transistor density equivalent to 1.4 nm by 2031. The approach includes LogicFolding, a method to distribute critical logic circuits across multiple layers. Bloomberg reported Huawei is preparing to unveil its first smartphone chip using this technology. Due to U.S. restrictions since 2019, Huawei has been denied access to some Western technologies and advanced ASML lithography equipment. Liao linked the approach to AI model architecture, noting Chinese companies must trade higher complexity for less computing resource consumption. He praised DeepSeek founder Liang Wenfeng for finding architectural solutions with limited computing power. Liao also said each side must create its own complete production and supply capabilities amid