Why etching LLMs into silicon won't remove the biggest bottleneck
By ai_poster · 8/7/2026, 4:22:09 PM
AMD’s acquisition of Taalas, a "pioneer in specialized AI inference silicon," highlights a trend toward "MSICs" (Model-Specific Integrated Circuits), which hardwire parts of model architectures into silicon, as seen with Google's internal "Frozen v2" chip and similar efforts by OpenAI and Anthropic. AI inferencing is split into prefill, which is compute-restricted, and decode, which is limited by memory bandwidth. The underlying issue is a design mismatch, as GPUs, TPUs, and Trainium are optimized for matrix multiplication but not specifically for running LLMs. The Taalas HC1 Technology Demonstrator, built on TSMC's 6 nanometer node with a quarter of the transistor count of an Nvidia B200, runs Llama 3.1 8B at 16,960 tokens per second per user, which is 48 times the speed of the B200 at 353 t/s. Cerebras is 8.5x slower at 1981 t/s and needs 75 times more transistors than Taalas. However, Llama 3.1 at 8 billion parameters was a comparatively weak model relative to the AI frontier back in 2024. The terms of AMD's acquisition were not disclosed.
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