Samsung Foundry has publicly confirmed that the Tesla-Samsung AI5 chip has reached tape-out, marking the completion of its design phase for manufacturing at Samsung's Taylor, Texas plant on a 2nm process. The announcement came from a Samsung Foundry Principal Engineer and was surfaced by Sawyer Merritt on X. Tesla's AI5 features transistors that are 3.5× smaller than those in the current AI4 chip. According to the article, the AI5 chip's process node is 2nm (Samsung Taylor + TSMC Arizona), with compute estimated at ~2,000–2,500 TOPS, which is ~8x versus AI4. Memory per SoC is up to 192GB LPDDR5X (SK Hynix), ~9x less than AI4, and peak power draw is 700–800W versus ~300W for AI4. Target volume production is late 2026 / early 2027. Engineering samples are expected in late 2026, with high-volume production targeted for late 2026 or early 2027. The disclosure fuels speculation about whether a refreshed Model Y ("Model YL") could be the first vehicle to carry HW5 as early as next year.